1. Field of the Invention
The invention relates to silicon integrated circuit technology, and, more particularly, to an anisotropic etch process using Cl.sub.2 /He chemistry in the manufacture of a silicon integrated circuit device.
2. Background of the Invention
Etching processes are often employed in the manufacture of silicon integrated circuit devices. Silicon integrated circuit manufacturing processes typically begin with a single-crystal silicon (Si) workpiece. The workpiece is subjected to a series of steps carried out in a particular order. Those steps serve to appropriately layer and configure the wafer workpiece with desired semiconductor pathways to create a useable integrated circuit device. The ordering of the steps, and the parameters for those steps, dictate the resulting integrated semiconductor circuitry achieved from the manufacturing process.
The term "etching" describes a variety of techniques by which material is removed uniformly, or in the delineation of a pattern, from a wafer during manufacture of a silicon integrated circuit device. Etching is often a step or steps in the manufacturing process. Etching steps serve both to "clean" the surface of a wafer to remove defects and/or foreign debris and to shape or "profile" the wafer as appropriate for the manufacturing process. In any case, the goal in etching is removal of portions of material from a wafer as desired for the particular application.
There are several types or classifications of etching processes. Of these different types or classifications, there has been no single type or classification of etch which is best or preferred in all circumstances. Typically, a particular type or classification of etch is only suitable for a particular application or class of applications. It would be an improvement in the technology if an etch process were developed that exhibits favorable aspects in several or a number of varied applications.
The first category of types or classifications of etching processes deals with the particular etchant which effects the etch, i.e., the medium which causes the removal. Generally, there are two types of etchants: chemical and physical. In the case of chemical etchants, a chemical is used to dissolve or react with materials of the wafer to be etched away. Chemical etching may occur by any of several different processes. The simplest process is dissolution of a material to be etched from the wafer in a solvent without any change in the chemical nature of the dissolved material. Other chemical etching processes involve one or more chemical reactions in which the product formed from the reaction is soluble in the etching medium or may be carried away from the surface by the medium. Various types of reactions which may be involved are oxidation-reduction, complexation, and vaporization. In these processes, the parameters of the etching steps, such as temperature and pressure in which the process occurs, may be important factors to the success of the etch.
The second type of etchants are physical etchants. In physical etching processes, material is selectively removed from the wafer by momentum transfer from a rapidly moving inert projectile. Ion milling is one form of physical etching. Another form of physical etching is sputtering. Both of these techniques require the formation of a gas discharge producing high-velocity ions. The high-velocity ions bombard the wafer in selective locations causing removal of desired materials from the wafer. These processes are referred to as plasma-assisted processes because characteristics of the particular gas discharge may be important to the etch outcome.
Etching processes are also typed or classified by the degree of anisotrophy of the etch. Anisotropic etching occurs in a single direction, whereas isotropic (the opposite of anisotrophic) etching occurs in all directions. Typically, in an etch, amorphous materials of uniform composition will be etched isotropically, whereas many crystalline materials will be etched both isotropically and anisotropically. The degree of anisotrophy of etching usually will depend upon the crystallographic orientation of the material being etched and the particular etching reagent used. Where a polishing action is desired from the etch, isotropic etching is preferred to achieve a structureless, or smooth, surface. If structural shaping is the objective of the etch, however, anisotropic conditions are preferred. The degree of anisotrophy of an etch depends on a variety of parameters, such as the particular etchant, the temperature, the pressure, the selectivity of the etchant for particular materials of the wafer, and others.
Etching processes may be even further typed or classified as wet or dry etchings. In wet etching processes, etching takes place in a liquid. In dry etching processes, etching takes place in a gas. A variety of factors impact wet or dry etching processes, such as the particular liquid or gas medium, temperatures, processes, and other factors.
Selectivity of etching processes is another factor important in classifying or typing etch processes. Selectivity, in fact, is one of the most important factors affecting the effectiveness of and outcome of an etching process. Selectivity refers to differences in etch rates between different materials, or between compositional or structural variations of the same materials. Most etching processes must be controllably selective because the material to be etched is usually part of, or in close proximity or relationship with, a wafer that consists of several material components. Selectivity in etching depends upon a number of factors, such as choice of etching technique, etchant composition, temperatures, pressures, and constraints of the system and materials etched.
The foregoing types or classifications of etching processes are not absolute, as many etching processes may include combinations and variations on the categories. Nevertheless, the presently most used etching processes can be generally classified by reference to these various categories. Because each category has particular advantages/disadvantages and characteristics in particular applications, it would be beneficial to have an etching process which works effectively in a variety of conditions and applications.
In the manufacture of silicon integrated circuit devices by the aforesaid etching processes and other manufacturing techniques, there often occurs an undesired result: The actual geographic configuration of the product device differs from the design geographic configuration. This discrepancy between actual and design is many times the result of inaccuracies and ineffectiveness of etching processes in delivering desired results. As previously described, there can be numerous factors important to the result obtained from an etching process, including for example, anisotrophy of the etch, inability of equipment to maintain optimum conditions of sterility and tolerance, pressures, temperatures, chemistry of etchant compositions, and others. These factors and others may result in dimensional and compositional changes in the actual device from the design device. Those changes can lead to functional and operational problems. Designers and manufacturers of silicon integrated circuit devices must understand that these changes in dimensions will occur in an etch and must compensate therefor in the design and manufacturing process. Of course, it is preferable to limit the possibility of these changes whenever possible. Those who practice the art, therefore, continually search for still better and improved methods to maintain desired wafer geographic configuration or "profiles" and other aspects of wafer quality.
The present invention provides for an improved etching process which has, in tests, proven to be particularly effective in substantially maintaining desired profiles upon etching. Further, the etch process has proven to substantially improve characteristics of the etch, such as selectively and anisotrophy. Even further, the present etch process provides these improvements and yet maintains generally desirable characteristics of etch processes, for example, etch rate and other conditions necessary for a commercially useable etch process.
In the particular instance where polysilicon formed atop a silicon wafer is to be etched from particular locations on the wafer, the present etch process has proven especially effective when employed in that instance simultaneously with a nitride spacer. As background, a common technique has been to, through the manufacturing process, top polysilicon with a silicon dioxide layer and a nitride layer (collectively, "Nitride/Oxide layer"). Such a Nitride/Oxide layer typically consists of a very thin silicon dioxide ("oxide") layer, topped by a very thin silicon nitride ("nitride") layer. This Nitride/Oxide layer is typically employed to protect the polysilicon layer from succeeding oxidation processes. The Nitride/Oxide layer, as well as adjacent polysilicon, may then be selectively etched away by an etching process, as previously described, termed a "gate" etch. After such an etch to selectively remove the Nitride/Oxide layer and adjacent polysilicon, an oxidation step will be carried out in order to oxidize the remaining silicon of the wafer and the sidewalls of the remaining polysilicon. Any remaining Nitride/Oxide layer will then be removed and a silicon dioxide-silicon nitride-silicon dioxide layer ("ONO layer") will be applied to the wafer. The ONO layer is often used as a dielectric path between the first polysilicon and a second polysilicon. The second polysilicon is then, in the typical manufacturing process succession, applied atop the remaining surface of the wafer. In a subsequent second gate etch, the second polysilicon layer is selectively removed, together with portions of the ONO layer. An even further etch, a self-align etch, removes any remaining ONO layer and the first polysilicon in area not protected by remaining second polysilicon. This final self-align etch yields a select stack gate structure of the first polysilicon, topped by ONO layer, topped by the second polysilicon.
This self-align etch of the prior technology manufacture process has been observed to lead to certain problems in these silicon integrated circuit devices obtained from the manufacturing process. Those problems include what has been termed "stringers" and "trenches". Stringers refer to remaining portions of the second polysilicon layer which, because of the particular succession of manufacturing steps, will often remain topped by oxide, even after the self-align etch. Trenches, on the other hand, refer to grooves resulting in the silicon wafer surface as the result of the over-etching.
These two problems, i.e., stringers and trenches, lead to a wide variety of functional problems in the devices obtained from the prior technology etching processes. For example, the stringers may cause shorts in the device since any remaining second layer of polysilicon may inappropriately connect with electrical flow paths of the device. The trenches are problematic, for example, because they may cause high silicon resistance in the area of the trench since the cross-sectional area for electrical flow is reduced through the silicon in the vicinity of the trench.
One possible solution to help eliminate the stringer and trench problems has been described in the related application referred to above, which application is incorporated herein by reference thereto. That application describes the use of a nitride spacer which is layered on the wafer at a particular stage in the manufacturing process and then selectively etched from the wafer. The present etch process is thought particularly effective when employed in such a manufacturing process wherein a nitride spacer is employed. The present etch process, however, as previously discussed, has proven to be a much improved etch in a variety of other applications and processes, as well.